SystemVerilog FrameWorks^TM :   is a collection of tools and a code library to assist engineers who are developing SystemVerilog based verification environments. Components include utility libraries, scoreboard and shutdown manager implementation, register tool, etc.
Currently, we have the following software available :

a. Scoreboard

b. Shutdown Manager

Template Generators for OVM and VMM!:  Generate detailed OVM and VMM verification environments supported across muliple vendors.

RegWorks^TM:  a set of tools intended to automate the process of register class creation directly from the design specification. It can also be used with other third party tools such as Synopsys RAL or equivalent.